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Jacob Sorber

Learn make in 60 seconds.

More make: automatic variables for smaller and easier to maintain makefiles

GNU make manual

GNU make

Basics of Make

hello: hello.c
	gcc -o hello hello.c

• Rule: hello
• Dependency: hello.c
• target: hello

Automatic variable

• $@
  • refers to target
• $%
  • target member name
  • foo.a(bar.o)
  • $% is bar.o and $@ is foo.a
• %.o: %.c
  • % is wildcard in make
• $^
  • names of all the prerequisites, with spaces between them.
• $?
  • names of all the prerequisites that are new than the target, with spaces between them
• $+
  • This is like ‘$^’ but prerequisites listed more than once are duplicated in they were listed in the makefile.

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